RF power amplifiers are used in a variety of applications such as base stations for wireless communication systems, etc. The signals amplified by the RF power amplifiers often include signals that have a high frequency modulated carrier having frequencies in the 400 megahertz (MHz) to 60 gigahertz (GHz) range. The baseband signal that modulates the carrier is typically at a relatively lower frequency and, depending on the application, can be up to 300 MHz or higher.
RF power amplifiers are designed to provide linear operation without distortion. Input and output impedance matching circuits are used to match RF transistors that may have low input and output impedances (e.g., around 1 ohm or less for high power devices), to the impedance matching networks of an external device, such as a circuit board.
Class F amplifier configurations are gaining increased favor due to their highly efficient operation in modern RF applications. Class F amplifier design requires careful tuning of higher order harmonics. Power efficiency can be improved by incorporating harmonic tuning circuits in impedance matching circuit topology. One way to provide these harmonic tuning circuit is to etch patterns into an RF specific, low loss PCB (printed circuit board). The distributed nature of these matching networks and the high quality of the metallization and dielectric produces a highly efficient configuration. Unfortunately, these networks are also physically large, and the exact size of the elements depends on the dielectric constant of the PCB, the thickness of the PCB, and is inversely related to the frequency of operation. Other impedance matching techniques utilize a mix of high dielectric constant materials to implement the harmonic terminations in a space efficient manner and a lower dielectric constant material for the rest of the matching network. These implementations tend to be expensive and difficult to manufacture due to thermal mechanical concerns. Another impedance matching technique occurs at the package level and involves using bonding wires and chip capacitors to form the lumped elements that provide harmonic tuning. These configurations tend to exhibit high loss at both DC and RF, but can be made extremely compact, due to their “lumped” nature. The DC resistance of the series bond wires between the package and the die are not negligible, especially in high-power GaN applications in which the power densities can be extremely high and the number of bond wires that can fit on a pad are limited.